Details
- AMD announced more than $10 billion in investments across Taiwan to expand strategic partnerships and scale advanced packaging manufacturing for next-generation AI infrastructure.
- The effort involves partners including ASE, SPIL, PTI, Unimicron, Nan Ya PCB, Kinsus, Sanmina, Wiwynn, Wistron, Inventec and AIC, alongside AMD’s in-house silicon, packaging and system design teams.
- Key technology initiatives center on Elevated Fanout Bridge (EFB)–based 2.5D packaging that boosts interconnect bandwidth and power efficiency for 6th Gen AMD EPYC CPUs, codenamed “Venice,” and enables high-bandwidth links at panel scale.
- These packaging and ecosystem advances will underpin the AMD Helios rack-scale platform, combining “Venice” CPUs, AMD Instinct MI450X GPUs, advanced networking and the ROCm software stack, with multi-gigawatt deployments targeted from the second half of 2026.
- The move reinforces AMD’s strategy to pair chiplet and HBM expertise with Taiwan’s advanced packaging and substrate supply chain, as hyperscalers and cloud providers globally race to expand AI data center capacity.
Impact
AMD’s multi‑year, multi‑billion‑dollar bet on Taiwan’s advanced packaging capacity positions it to compete more directly with Nvidia and other AI infrastructure incumbents as rack‑scale deployments ramp in 2026–2028. The industrialization of EFB and panel‑based 2.5D packaging should influence data center CPU/GPU roadmap decisions and could accelerate a broader industry shift toward tightly integrated, power‑efficient rack‑scale AI systems.
